ATCS-15 1464-0320 The new acceleration card features a full-height, 3/4 length (FH¾L) dimension, powered by AMD Versal™ HBM Adaptive SoC, FPGA architecture with 2,600,000 LUT logic units, 10,848 DSP compute logic chips, and 820 GB/s memory bandwidth help overcome performance bottlenecks.
Compared to its predecessor, the AMD Alveo U55C compute acceleration card, the Alveo V80 has up to twice the logical density, up to twice the memory bandwidth, and up to four times the network bandwidth, enabling a powerful compute cluster while optimizing the number of cards, servers, and rack space.
Network-attached accelerator cards designed for large data sets and memory-intensive workloads
The hardware flexibility of the Alveo V80 card allows for a wide rangeATCS-15 1464-0320 of applications across different custom workloads. As a 4x200G network-attached acceleration card, the card can process large amounts of incoming data in real time, bypassing PCIe® connection limitations encountered by Gpus.
Figure 2: Massive acceleration of compute-intensive memory-constrained workloads
The Alveo V80 accelerator card scales to hundreds of nodes over Ethernet for computing clustering, making it ideal for a range of high-performance computing applications, including genome sequencing, molecular dynamics, and sensor processing. In terms of network security, the built-in 400G encryption engine and 600G Ethernet hardblock, combined with the hardware flexibility of the FPGA, make the Alveo V80 accelerator suitable for line-speed packet detection and AI-supported anomaly detection.
The accelerator card is also ideal for computational storage and data analytics, with the ability to integrate compression and query acceleration on the same card to increase effective storage capacity while gaining faster insights. In addition, it is suitable for a variety of fintech applications, including strategy backtesting, option pricing, and financial modeling and simulation.
Case study: Computational Leaps in astrophysics
The Commonwealth Scientific and Industrial Research Organisation (CSIRO) is AustATCS-15 1464-0320 ralia’s national research organisation involved in the construction of the world’s largest radio astronomy antenna array, which currently contains 420 Alveo U55C accelerator cards for processing radio waves to study the early universe and explore galactic evolution.
With the Alveo V80 accelerator card, CSIRO plans to reduce the size and cost of the board and reduce the number of accelerator cards required by up to 66 per cent, while handling new signal processing tasks from the telescope’s 131,000 antennas. Taking into account potential reductions in card, server, rack space and power consumption, this jump in computing power per card is expected to result in a total cost of ownership (TCO) reduction of up to 20%.
Grant Hampson, research engineer at CSIRO’s Division of Space and Astronomy, said: “We initially adopted the Alveo product line because of its ability to process large amounts of sensor data in real-time. For our next generation beamformers and correlators, reducing total cost of ownership is imperative. The Alveo V80 accelerator card is a technological step up from the previous generation Alveo U55C card, providing a compact and energy efficient solution with a cost-effective board area.”
The Alveo V80 accelerator card is fully available for traditional hardware developers via the Alveo Versal Example Design (AVED) and is now available on GitHub. AVED simplifies hardware startup with traditional FPGA and RTL processes and is based on the common Vivado tool process. The example design uses a pre-built subsystem implemented on an AMD Versal adaptive SoC and specifically targeted to the Alveo V80 accelerator card, providing an efficient starting point.
At the system level, the Alveo V80 compute accelerator card simplifies system integration and provides a fast path to mass production. By using pre-validated deployment cards, design teams can avoid PCB integration, inventory management, and product lifecycle management tasks.
